ghc-9.6.3: The GHC API

Safe Haskell | Safe-Inferred
Language | Haskell2010

GHC.CmmToAsm.AArch64.Instr

Contents

- Orphan instances

Synopsis

- stackFrameHeaderSize :: Platform -> Int
- spillSlotSize :: Int
- stackAlign :: Int
- maxSpillSlots :: NCGConfig -> Int
- spillSlotToOffset :: NCGConfig -> Int -> Int
- regUsageOfInstr :: Platform -> Instr -> RegUsage
- callerSavedRegisters :: [Reg]
- patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr
- isJumpishInstr :: Instr -> Bool
- jumpDestsOfInstr :: Instr -> [BlockId]
- patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr
- mkSpillInstr :: HasCallStack => NCGConfig -> Reg -> Int -> Int -> [Instr]
- mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr]
- takeDeltaInstr :: Instr -> Maybe Int
- isMetaInstr :: Instr -> Bool
- mkRegRegMoveInstr :: Reg -> Reg -> Instr
- takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg)
- mkJumpInstr :: BlockId -> [Instr]
- mkStackAllocInstr :: Platform -> Int -> [Instr]
- mkStackDeallocInstr :: Platform -> Int -> [Instr]
- allocMoreStack :: Platform -> Int -> NatCmmDecl statics Instr -> UniqSM (NatCmmDecl statics Instr, [(BlockId, BlockId)])
- data Instr
  - = COMMENT SDoc
  - | MULTILINE_COMMENT SDoc
  - | ANN SDoc Instr
  - | LOCATION Int Int Int String
  - | LDATA Section RawCmmStatics
  - | NEWBLOCK BlockId
  - | DELTA Int
  - | SXTB Operand Operand
  - | UXTB Operand Operand
  - | SXTH Operand Operand
  - | UXTH Operand Operand
  - | PUSH_STACK_FRAME
  - | POP_STACK_FRAME
  - | ADD Operand Operand Operand
  - | CMN Operand Operand
  - | CMP Operand Operand
  - | MSUB Operand Operand Operand Operand
  - | MUL Operand Operand Operand
  - | NEG Operand Operand
  - | SDIV Operand Operand Operand
  - | SMULH Operand Operand Operand
  - | SMULL Operand Operand Operand
  - | SUB Operand Operand Operand
  - | UDIV Operand Operand Operand
  - | SBFM Operand Operand Operand Operand
  - | UBFM Operand Operand Operand Operand
  - | SBFX Operand Operand Operand Operand
  - | UBFX Operand Operand Operand Operand
  - | AND Operand Operand Operand
  - | ANDS Operand Operand Operand
  - | ASR Operand Operand Operand
  - | BIC Operand Operand Operand
  - | BICS Operand Operand Operand
  - | EON Operand Operand Operand
  - | EOR Operand Operand Operand
  - | LSL Operand Operand Operand
  - | LSR Operand Operand Operand
  - | MOV Operand Operand
  - | MOVK Operand Operand
  - | MVN Operand Operand
  - | ORN Operand Operand Operand
  - | ORR Operand Operand Operand
  - | ROR Operand Operand Operand
  - | TST Operand Operand
  - | STR Format Operand Operand
  - | STLR Format Operand Operand
  - | LDR Format Operand Operand
  - | LDAR Format Operand Operand
  - | STP Format Operand Operand Operand
  - | LDP Format Operand Operand Operand
  - | CSET Operand Cond
  - | CBZ Operand Target
  - | CBNZ Operand Target
  - | J Target
  - | B Target
  - | BL Target [Reg] [Reg]
  - | BCOND Cond Target
  - | DMBSY
  - | FCVT Operand Operand
  - | SCVTF Operand Operand
  - | FCVTZS Operand Operand
  - | FABS Operand Operand
- instrCon :: Instr -> String
- data Target
  - = TBlock BlockId
  - | TLabel CLabel
  - | TReg Reg
- data ExtMode
  - = EUXTB
  - | EUXTH
  - | EUXTW
  - | EUXTX
  - | ESXTB
  - | ESXTH
  - | ESXTW
  - | ESXTX
- data ShiftMode
  - = SLSL
  - | SLSR
  - | SASR
  - | SROR
- type ExtShift = Int
- type RegShift = Int
- data Operand
  - = OpReg Width Reg
  - | OpRegExt Width Reg ExtMode ExtShift
  - | OpRegShift Width Reg ShiftMode RegShift
  - | OpImm Imm
  - | OpImmShift Imm ShiftMode RegShift
  - | OpAddr AddrMode
- opReg :: Width -> Reg -> Operand
- xzr :: Operand
- wzr :: Operand
- sp :: Operand
- ip0 :: Operand
- _x :: Int -> Operand
- x0 :: Operand
- x1 :: Operand
- x2 :: Operand
- x3 :: Operand
- x4 :: Operand
- x5 :: Operand
- x6 :: Operand
- x7 :: Operand
- x8 :: Operand
- x9 :: Operand
- x10 :: Operand
- x11 :: Operand
- x12 :: Operand
- x13 :: Operand
- x14 :: Operand
- x15 :: Operand
- x16 :: Operand
- x17 :: Operand
- x18 :: Operand
- x19 :: Operand
- x20 :: Operand
- x21 :: Operand
- x22 :: Operand
- x23 :: Operand
- x24 :: Operand
- x25 :: Operand
- x26 :: Operand
- x27 :: Operand
- x28 :: Operand
- x29 :: Operand
- x30 :: Operand
- x31 :: Operand
- _d :: Int -> Operand
- d0 :: Operand
- d1 :: Operand
- d2 :: Operand
- d3 :: Operand
- d4 :: Operand
- d5 :: Operand
- d6 :: Operand
- d7 :: Operand
- d8 :: Operand
- d9 :: Operand
- d10 :: Operand
- d11 :: Operand
- d12 :: Operand
- d13 :: Operand
- d14 :: Operand
- d15 :: Operand
- d16 :: Operand
- d17 :: Operand
- d18 :: Operand
- d19 :: Operand
- d20 :: Operand
- d21 :: Operand
- d22 :: Operand
- d23 :: Operand
- d24 :: Operand
- d25 :: Operand
- d26 :: Operand
- d27 :: Operand
- d28 :: Operand
- d29 :: Operand
- d30 :: Operand
- d31 :: Operand
- opRegUExt :: Width -> Reg -> Operand
- opRegSExt :: Width -> Reg -> Operand

# Documentation

stackFrameHeaderSize :: Platform -> Int Source #

TODO: verify this!

spillSlotSize :: Int Source #

All registers are 8 byte wide.

stackAlign :: Int Source #

The number of bytes that the stack pointer should be aligned to.

maxSpillSlots :: NCGConfig -> Int Source #

The number of spill slots available without allocating more.

spillSlotToOffset :: NCGConfig -> Int -> Int Source #

Convert a spill slot number to a *byte* offset, with no sign.

regUsageOfInstr :: Platform -> Instr -> RegUsage Source #

callerSavedRegisters :: [Reg] Source #

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 42 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | |== General Purpose registers ==================================================================================================================================| | argument passing ------------- | IR | tmp registers -------- | IP0| IP1| PL | callee saved ------------ | FP | LR | SP | | free registers -------------------------------------------------------------------- | BR | Sp | Hp | R1 | R2 | R3 | R4 | R5 | R6 | SL | -- | -- | -- | |== SIMD/FP Registers ==========================================================================================================================================| | argument passing ------------- | callee saved (lower 64 bits) --- | caller saved ---------------------- | | free registers ------------- | F1 | F2 | F3 | F4 | D1 | D2 | D3 | D4 | free registers ----------------------------------------------------- | '---------------------------------------------------------------------------------------------------------------------------------------------------------------' IR: Indirect result location register, IP: Intra-procedure register, PL: Platform register, FP: Frame pointer, LR: Link register, SP: Stack pointer BR: Base, SL: SpLim

patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr Source #

Apply a given mapping to all the register references in this instruction.

isJumpishInstr :: Instr -> Bool Source #

Checks whether this instruction is a jump/branch instruction. One that can change the flow of control in a way that the register allocator needs to worry about.

jumpDestsOfInstr :: Instr -> [BlockId] Source #

Checks whether this instruction is a jump/branch instruction. One that can change the flow of control in a way that the register allocator needs to worry about.

patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr Source #

Change the destination of this jump instruction. Used in the linear allocator when adding fixup blocks for join points.

mkSpillInstr :: HasCallStack => NCGConfig -> Reg -> Int -> Int -> [Instr] Source #

An instruction to spill a register into a spill slot.

mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source #

takeDeltaInstr :: Instr -> Maybe Int Source #

See if this instruction is telling us the current C stack delta

isMetaInstr :: Instr -> Bool Source #

mkRegRegMoveInstr :: Reg -> Reg -> Instr Source #

Copy the value in a register to another one. Must work for all register classes.

takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg) Source #

Take the source and destination from this reg -> reg move instruction or Nothing if it's not one

mkJumpInstr :: BlockId -> [Instr] Source #

Make an unconditional jump instruction.

mkStackAllocInstr :: Platform -> Int -> [Instr] Source #

mkStackDeallocInstr :: Platform -> Int -> [Instr] Source #

allocMoreStack :: Platform -> Int -> NatCmmDecl statics Instr -> UniqSM (NatCmmDecl statics Instr, [(BlockId, BlockId)]) Source #

data Instr Source #

Constructors

COMMENT SDoc |
MULTILINE_COMMENT SDoc |
ANN SDoc Instr |
LOCATION Int Int Int String |
LDATA Section RawCmmStatics |
NEWBLOCK BlockId |
DELTA Int |
SXTB Operand Operand |
UXTB Operand Operand |
SXTH Operand Operand |
UXTH Operand Operand |
PUSH_STACK_FRAME | SXTW Operand Operand | SXTX Operand Operand
POP_STACK_FRAME |
ADD Operand Operand Operand | ADC Operand Operand Operand -- rd = rn + rm + C | ADCS ...
CMN Operand Operand | ADDS Operand Operand Operand -- rd = rn + rm | ADR ... | ADRP ...
CMP Operand Operand |
MSUB Operand Operand Operand Operand | MADD ... | MNEG ...
MUL Operand Operand Operand |
NEG Operand Operand |
SDIV Operand Operand Operand | NEGS ... | NGC ... | NGCS ... | SBC ... | SBCS ...
SMULH Operand Operand Operand | SMADDL ... | SMNEGL ... | SMSUBL ...
SMULL Operand Operand Operand |
SUB Operand Operand Operand |
UDIV Operand Operand Operand | SUBS ...
SBFM Operand Operand Operand Operand | UMADDL ... -- Xd = Xa + Wn × Wm | UMNEGL ... -- Xd = - Wn × Wm | UMSUBL ... -- Xd = Xa - Wn × Wm | UMULH ... -- Xd = (Xn × Xm)_127:64 | UMULL ... -- Xd = Wn × Wm
UBFM Operand Operand Operand Operand |
SBFX Operand Operand Operand Operand |
UBFX Operand Operand Operand Operand |
AND Operand Operand Operand |
ANDS Operand Operand Operand |
ASR Operand Operand Operand |
BIC Operand Operand Operand |
BICS Operand Operand Operand |
EON Operand Operand Operand |
EOR Operand Operand Operand |
LSL Operand Operand Operand |
LSR Operand Operand Operand |
MOV Operand Operand |
MOVK Operand Operand |
MVN Operand Operand | MOVN Operand Operand | MOVZ Operand Operand
ORN Operand Operand Operand |
ORR Operand Operand Operand |
ROR Operand Operand Operand |
TST Operand Operand |
STR Format Operand Operand |
STLR Format Operand Operand |
LDR Format Operand Operand |
LDAR Format Operand Operand |
STP Format Operand Operand Operand |
LDP Format Operand Operand Operand |
CSET Operand Cond |
CBZ Operand Target |
CBNZ Operand Target |
J Target |
B Target |
BL Target [Reg] [Reg] |
BCOND Cond Target |
DMBSY |
FCVT Operand Operand |
SCVTF Operand Operand |
FCVTZS Operand Operand |
FABS Operand Operand |

#### Instances

Instances details

Instruction Instr Source # | Instruction instance for aarch64

Instance details

Defined in GHC.CmmToAsm.AArch64

Methods

regUsageOfInstr :: Platform -> Instr -> RegUsage Source #

patchRegsOfInstr :: Instr -> (Reg -> Reg) -> Instr Source #

isJumpishInstr :: Instr -> Bool Source #

jumpDestsOfInstr :: Instr -> [BlockId] Source #

patchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr Source #

mkSpillInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source #

mkLoadInstr :: NCGConfig -> Reg -> Int -> Int -> [Instr] Source #

takeDeltaInstr :: Instr -> Maybe Int Source #

isMetaInstr :: Instr -> Bool Source #

mkRegRegMoveInstr :: Platform -> Reg -> Reg -> Instr Source #

takeRegRegMoveInstr :: Instr -> Maybe (Reg, Reg) Source #

mkJumpInstr :: BlockId -> [Instr] Source #

mkStackAllocInstr :: Platform -> Int -> [Instr] Source #

mkStackDeallocInstr :: Platform -> Int -> [Instr] Source #

pprInstr :: Platform -> Instr -> SDoc Source #

mkComment :: FastString -> [Instr] Source #

instrCon :: Instr -> String Source #

data Target Source #

Constructors

TBlock BlockId |
TLabel CLabel |
TReg Reg |

data ExtMode Source #

Constructors

EUXTB |
EUXTH |
EUXTW |
EUXTX |
ESXTB |
ESXTH |
ESXTW |
ESXTX |

#### Instances

Instances details

Show ExtMode Source # |
Instance details Defined in GHC.CmmToAsm.AArch64.Instr Methods showsPrec :: Int -> ExtMode -> ShowS Source # show :: ExtMode -> String Source # showList :: [ExtMode] -> ShowS Source #
Eq ExtMode Source # |
Instance details Defined in GHC.CmmToAsm.AArch64.Instr Methods (==) :: ExtMode -> ExtMode -> Bool # (/=) :: ExtMode -> ExtMode -> Bool #

data ShiftMode Source #

Constructors

SLSL |
SLSR |
SASR |
SROR |

#### Instances

Instances details

Show ShiftMode Source # |
Instance details Defined in GHC.CmmToAsm.AArch64.Instr Methods showsPrec :: Int -> ShiftMode -> ShowS Source # show :: ShiftMode -> String Source # showList :: [ShiftMode] -> ShowS Source #
Eq ShiftMode Source # |
Instance details Defined in GHC.CmmToAsm.AArch64.Instr Methods (==) :: ShiftMode -> ShiftMode -> Bool # (/=) :: ShiftMode -> ShiftMode -> Bool #

type ExtShift = Int Source #

type RegShift = Int Source #

data Operand Source #

Constructors

OpReg Width Reg |
OpRegExt Width Reg ExtMode ExtShift |
OpRegShift Width Reg ShiftMode RegShift |
OpImm Imm |
OpImmShift Imm ShiftMode RegShift |
OpAddr AddrMode |

#### Instances

Instances details

Show Operand Source # |
Instance details Defined in GHC.CmmToAsm.AArch64.Instr Methods showsPrec :: Int -> Operand -> ShowS Source # show :: Operand -> String Source # showList :: [Operand] -> ShowS Source #
Eq Operand Source # |
Instance details Defined in GHC.CmmToAsm.AArch64.Instr Methods (==) :: Operand -> Operand -> Bool # (/=) :: Operand -> Operand -> Bool #

opReg :: Width -> Reg -> Operand Source #

xzr :: Operand Source #

wzr :: Operand Source #

sp :: Operand Source #

ip0 :: Operand Source #

_x :: Int -> Operand Source #

x0 :: Operand Source #

x1 :: Operand Source #

x2 :: Operand Source #

x3 :: Operand Source #

x4 :: Operand Source #

x5 :: Operand Source #

x6 :: Operand Source #

x7 :: Operand Source #

x8 :: Operand Source #

x9 :: Operand Source #

x10 :: Operand Source #

x11 :: Operand Source #

x12 :: Operand Source #

x13 :: Operand Source #

x14 :: Operand Source #

x15 :: Operand Source #

x16 :: Operand Source #

x17 :: Operand Source #

x18 :: Operand Source #

x19 :: Operand Source #

x20 :: Operand Source #

x21 :: Operand Source #

x22 :: Operand Source #

x23 :: Operand Source #

x24 :: Operand Source #

x25 :: Operand Source #

x26 :: Operand Source #

x27 :: Operand Source #

x28 :: Operand Source #

x29 :: Operand Source #

x30 :: Operand Source #

x31 :: Operand Source #

_d :: Int -> Operand Source #

d0 :: Operand Source #

d1 :: Operand Source #

d2 :: Operand Source #

d3 :: Operand Source #

d4 :: Operand Source #

d5 :: Operand Source #

d6 :: Operand Source #

d7 :: Operand Source #

d8 :: Operand Source #

d9 :: Operand Source #

d10 :: Operand Source #

d11 :: Operand Source #

d12 :: Operand Source #

d13 :: Operand Source #

d14 :: Operand Source #

d15 :: Operand Source #

d16 :: Operand Source #

d17 :: Operand Source #

d18 :: Operand Source #

d19 :: Operand Source #

d20 :: Operand Source #

d21 :: Operand Source #

d22 :: Operand Source #

d23 :: Operand Source #

d24 :: Operand Source #

d25 :: Operand Source #

d26 :: Operand Source #

d27 :: Operand Source #

d28 :: Operand Source #

d29 :: Operand Source #

d30 :: Operand Source #

d31 :: Operand Source #

opRegUExt :: Width -> Reg -> Operand Source #

opRegSExt :: Width -> Reg -> Operand Source #

# Orphan instances

Outputable RegUsage Source # | Get the registers that are being used by this instruction. regUsage doesn't need to do any trickery for jumps and such. Just state precisely the regs read and written by that insn. The consequences of control flow transfers, as far as register allocation goes, are taken care of by the register allocator. RegUsage = RU [regs] [regs]
Instance details Methods ppr :: RegUsage -> SDoc Source #