core/stdarch/crates/core_arch/src/x86/movrs.rs
1//! Read-shared move intrinsics
2
3#[cfg(test)]
4use stdarch_test::assert_instr;
5
6unsafe extern "unadjusted" {
7 #[link_name = "llvm.x86.prefetchrs"]
8 fn prefetchrs(p: *const u8);
9}
10
11/// Prefetches the cache line that contains address `p`, with an indication that the source memory
12/// location is likely to become read-shared by multiple processors, i.e., read in the future by at
13/// least one other processor before it is written, assuming it is ever written in the future.
14///
15/// Note: this intrinsic is safe to use even though it takes a raw pointer argument. In general, this
16/// cannot change the behavior of the program, including not trapping on invalid pointers.
17#[inline]
18#[target_feature(enable = "movrs")]
19#[cfg_attr(all(test, not(target_vendor = "apple")), assert_instr(prefetchrst2))]
20#[unstable(feature = "movrs_target_feature", issue = "137976")]
21pub fn _m_prefetchrs(p: *const u8) {
22 unsafe { prefetchrs(p) }
23}