{% if False %} {% endif %} SystemVerilog Report

SV-Tests

Test suite to check compliance with the SystemVerilog LRM by chapter as well as some real-world cores and test-cases.

{% for tool, tooldata in report|dictsort %} {% endfor %} {% for tag, info in database.items() %} {% for tool, tooldata in report|dictsort %} {% endfor %} {% endfor %} {% for tool, tooldata in report|dictsort %} {% endfor %} {% for tool, tooldata in report|dictsort %} {% endfor %} {% for tool, tooldata in report|dictsort %} {% endfor %} {% for tool, tooldata in report|dictsort %} {% endfor %} {% for tool, tooldata in report|dictsort %} {% endfor %} {% for tool, tooldata in report|dictsort %} {% endfor %} {% for tool, tooldata in report|dictsort %} {% endfor %}

		{{ tool.lower() }}
{% if tag in database_urls %} {{ info }} {% else %} {{ info }} {% endif %}	{{ tag }}	{% if "test-na" not in tooldata["tags"][tag]["status"] %} {{ tooldata["tags"][tag]["passed-num"] }}/{{ tooldata["tags"][tag]["logs"]\|length }} {% endif %}
Total tests passed		{{ report[tool]["total"]["tests"] }}/{{ report[tool]["tests"].keys()\|length }}
Total tags passed		{{ report[tool]["total"]["tags"]}}/{{ report[tool]["total"]["tested_tags"]}}
Total time elapsed		{{'%0.0f'\| format(report[tool]["time_elapsed"])}}s
User time elapsed		{{'%0.0f'\| format(report[tool]["user_time"])}}s
System time elapsed		{{'%0.0f'\| format(report[tool]["system_time"])}}s
Maximum ram usage		{{'%0.0f'\| format(report[tool]["ram_usage"])}} MB
Average throughput passed for inputs > 1KiB		{{'%0.0f'\| format(report[tool]["passed_throughput"]\|float)}} KiB/s

Download a summary in csv

{% for tag, info in database.items() %} {% for tool, tooldata in report.items() %} {% if "test-na" not in tooldata["tags"][tag]["status"] %}

{% for test, output in tooldata["tags"][tag]["logs_sorted"] %} {% endfor %}

{% endif %} {% endfor %} {% endfor %}